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開放NAND閃存接口ONFI介紹 (qq.com)

一.前言

ONFI即 Open NAND Flash Interface,開放NAND閃存接口.是一個(gè)由100多家制造、設(shè)計(jì)或啟用NAND閃存的公司組成的行業(yè)工作組,主要是Intel和鎂光。致力于簡化NAND閃存集成到消費(fèi)電子產(chǎn)品、計(jì)算平臺(tái)和任何其他需要固態(tài)大容量存儲(chǔ)的應(yīng)用程序中。為NAND閃存定義標(biāo)準(zhǔn)化的組件級接口規(guī)范以及連接器和模塊外形規(guī)格。使用開放接口標(biāo)準(zhǔn)加強(qiáng)了來自不同供應(yīng)商的NAND設(shè)備的兼容性和互操作性。這增加了標(biāo)準(zhǔn)器件的供應(yīng)基礎(chǔ)，縮短了設(shè)計(jì)時(shí)間并加快了上市時(shí)間。

從軟件的角度，主要是讀取符合ONFI標(biāo)準(zhǔn)的參數(shù)，比如容量等信息，用以做驅(qū)動(dòng)代碼的兼容性設(shè)計(jì)。這部分信息一般放置在指定的參數(shù)PAGE中，描述芯片組織、功能、時(shí)序和其他行為參數(shù)的數(shù)據(jù)結(jié)構(gòu)。

以下基于GD5F1GQ5xExxG詳細(xì)介紹ONFI的參數(shù)頁。

二.讀取參數(shù)頁

參考《GD5F1GQ5xExxG DATASHEET》的8.11 Read Parameter Page (P27)

參數(shù)PAGE至少有三份參數(shù)副本存儲(chǔ)在設(shè)備中，讀PAGE到Cache(13h) 之后，從Cache讀(03H/0BH)命令可用于讀指定的數(shù)據(jù)，可以一次只讀一份，如果校驗(yàn)錯(cuò)誤再偏移讀下一份。

操作過程如下:

1.配置B0寄存器的OTP_EN位為1

2.然后回讀確認(rèn)B0寄存器的OTP_EN位置1

3.使用(13h)指令加載地址24’h000004的PAGE到Cache中

4.讀C0寄存器，等待OIP為0表示操作完

5.使用(03H/0BH)命令從Cache中讀出指定數(shù)據(jù)。

如下是使用邏輯分析儀抓取的一次完整的操作

(1)先讀B0寄存器，設(shè)置OTP_EN位為1(bit6), 然后回讀確認(rèn)OTP_EN置位

(2)使用(13h)指令加載地址24’h000004的PAGE到Cache中，第一次讀C0寄存器為0x01即OIP=1還未完成，然后后面繼續(xù)讀OIP變?yōu)榱?表示完成。

(3)03H指令讀取整個(gè)PAGE的數(shù)據(jù)，可以看到256字節(jié)就重復(fù)了。

可以看到256字節(jié)重復(fù)了8遍，剛好2KB，最后還有128B的Spare區(qū)域

三.參數(shù)頁數(shù)據(jù)結(jié)構(gòu)

校驗(yàn)值如下

其中1.“O”代表可選，“M”代表強(qiáng)制

完整性CRC（循環(huán)冗余檢查）字段用于驗(yàn)證參數(shù)頁面的內(nèi)容是否已正確傳輸?shù)街鳈C(jī)。有關(guān)詳細(xì)信息，請參閱ONFI 1.0規(guī)范。CRC應(yīng)使用以下16位生成器多項(xiàng)式計(jì)算：G（X）=X^16+X^15+X^2+1，此十六進(jìn)制多項(xiàng)式可表示為8005h

CRC值應(yīng)在計(jì)算開始前用4F4Eh的值進(jìn)行初始化。在計(jì)算出最終CRC值之后，沒有對其應(yīng)用XOR。不存在數(shù)據(jù)字節(jié)或CRC計(jì)算值的反轉(zhuǎn)。

四.關(guān)鍵代碼

讀參數(shù)頁的主要流程，相關(guān)底層接口這里不再貼出

int nand_read_param_page(uint8_t* buffer, uint16_t start, uint16_t len)
{
    int res = 0;
    /*  設(shè)置OTP_EN =  1 */ 
    res = nand_set_otp(NAND_B_OPT_ACCESS,NAND_REG_RETRY);
    if(res == 0)
    {
        /* 加載數(shù)據(jù)到Cache */
        res = nand_read_page_to_cache(NAND_PARAM_PAGE_ADDR,NAND_PAGE_TO_CACHE_RETRY);
        if(res == 0)
        {
            /* 從Cache讀數(shù)據(jù) */
            res = nand_read_from_cache(start,  len, buffer);
            if(res == 0)
            {
                /* 成功 */
            }
            else
            {
                res = -3;
            }
        }
        else
        {
            return -2;
        }
    }
    else
    {
        res = -1;
    }
    /* 切回正常模式 */
    nand_set_otp(NAND_B_OPT_NORMAL,NAND_REG_RETRY);
    return res;
}

五.uCFS的NAND FTL中使用ONFI

fs_dev_nand_part_onfi.c

fs_dev_nand_part_onfi.h

函數(shù)FS_NAND_PartONFI_ParamPageParse根據(jù)參數(shù)頁解釋參數(shù)到FS_NAND_PART_DATA結(jié)構(gòu)體

/*
*********************************************************************************************************
*                                   FS_NAND_PartONFI_ParamPageParse()
*
* Description : Parse the ONFI parameter page.
*
* Argument(s) : p_part_data     Pointer to a NAND part data object.
*               -----------     Argument validated by caller.
*
*               p_err           Pointer to variable that will receive return the error code from this function :
*               -----           Argument validated by caller.
*
*                                   FS_ERR_DEV_NAND_ONFI_INVALID_PARAM_PAGE     Invalid parameter page.
*                                   FS_ERR_DEV_NAND_ONFI_VER_NOT_SUPPORTED      ONFI version not supported.
*                                   FS_ERR_NONE                                 Parameter page parsed successfully.
*
* Return(s)   : none.
*
* Note(s)     : none.
*********************************************************************************************************
*/

static  void  FS_NAND_PartONFI_ParamPageParse (FS_NAND_PART_DATA  *p_part_data,
                                               FS_ERR             *p_err)
{
    CPU_BOOLEAN  is_ver_supported;
    CPU_BOOLEAN  has_ext_pp;
    CPU_BOOLEAN  is_bus_16;
    CPU_BOOLEAN  is_invalid;
    CPU_INT08U   value;
    CPU_INT08U   multiplier;
    CPU_INT08U   lun_nbr;
    CPU_INT16U   version;
    CPU_INT32U   pg_size;
    CPU_INT32U   max_size;
    CPU_INT32U   nb_pg_per_blk;
    CPU_INT32U   blk_cnt;
    CPU_INT64U   max_blk_erase;
    CPU_DATA     ix;

   *p_err = FS_ERR_NONE;
                                                                /* -------------- REV INFO AND FEATURES --------------- */
                                                                /* Validate ONFI version.                               */
    MEM_VAL_COPY_GET_INT16U_LITTLE(&version, &FS_NAND_PartONFI_ParamPg[4]);

    is_invalid = DEF_BIT_IS_SET(version, DEF_BIT_00);
    if (is_invalid == DEF_YES) {
       *p_err = FS_ERR_DEV_INVALID;
        return;
    }

    ix = 0;
    is_ver_supported = DEF_NO;
    while ((is_ver_supported != DEF_YES) &&
           (ix < FS_NAND_PART_ONFI_V_QTY)){
        is_ver_supported = DEF_BIT_IS_SET(version, FS_NAND_PartONFI_SupportedVersions[ix]);
        ix++;
    }

    if (is_ver_supported == DEF_YES) {
        version = FS_NAND_PartONFI_SupportedVersions[ix - 1u];
    } else {
        FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse(): ONFI version not supported by this driver.rn"));
       *p_err = FS_ERR_DEV_INVALID;
        return;
    }

                                                                /* Identify features.                                   */
    has_ext_pp = DEF_BIT_IS_SET(FS_NAND_PartONFI_ParamPg[6], FS_NAND_PART_ONFI_FEATURE_EX_PP);

    is_bus_16  = DEF_BIT_IS_SET(FS_NAND_PartONFI_ParamPg[6], FS_NAND_PART_ONFI_FEATURE_BUS_16);
    if (is_bus_16 == DEF_YES) {
        p_part_data-??>BusWidth = 16u;
    } else {
        p_part_data->BusWidth =  8u;
    }

                                                                /* Extended parameter page length.                      */
    if (has_ext_pp == DEF_YES) {
        FS_NAND_PartONFI_ExtParamPageLen  = FS_NAND_PartONFI_ParamPg[12];
        FS_NAND_PartONFI_ExtParamPageLen |= (CPU_INT16U)((CPU_INT16U)FS_NAND_PartONFI_ParamPg[13] = FS_NAND_PART_ONFI_V21) {
        FS_NAND_PartONFI_ParamPageCnt = FS_NAND_PartONFI_ParamPg[14];
    } else {
        FS_NAND_PartONFI_ParamPageCnt = 3u;
    }

                                                                /* ----------- IDENTIFY MEMORY ORGANIZATION ----------- */
                                                                /* Page size.                                           */
    MEM_VAL_COPY_GET_INT32U_LITTLE(&pg_size, &FS_NAND_PartONFI_ParamPg[80]);
    max_size = (FS_NAND_PG_SIZE) -1;
    if (pg_size > max_size) {
        FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse(): Page size does not fit in container type FS_NAND_PG_SIZE.rn"));
       *p_err = FS_ERR_DEV_INCOMPATIBLE_LOW_PARAMS;
        return;
    }
    p_part_data->PgSize = pg_size;

                                                                /* Spare size.                                          */
    MEM_VAL_COPY_GET_INT16U_LITTLE(&(p_part_data->SpareSize), &FS_NAND_PartONFI_ParamPg[84]);

                                                                /* Nb of pages per blk.                                 */
    MEM_VAL_COPY_GET_INT32U_LITTLE(&nb_pg_per_blk, &FS_NAND_PartONFI_ParamPg[92]);
    max_size  = (FS_NAND_PG_PER_BLK_QTY) -1;
    if (nb_pg_per_blk > max_size) {
        FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse(): Nb of pages per blk does not fit in container type FS_NAND_PG_PER_BLK_QTY.rn"));
       *p_err = FS_ERR_DEV_INCOMPATIBLE_LOW_PARAMS;
        return;
    }
    p_part_data->PgPerBlk = nb_pg_per_blk;

                                                                /* Nb of block per logical unit.                        */
    MEM_VAL_COPY_GET_INT32U_LITTLE(&blk_cnt, &FS_NAND_PartONFI_ParamPg[96]);
    max_size = (FS_NAND_BLK_QTY) - 1;
    if (blk_cnt > max_size) {
        FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse(): Blk cnt does not fit in container type FS_NAND_BLK_QTY.rn"));
       *p_err = FS_ERR_DEV_INCOMPATIBLE_LOW_PARAMS;
        return;
    }
                                                                /* Nb of logical units.                                 */
    lun_nbr = FS_NAND_PartONFI_ParamPg[100];

    p_part_data->BlkCnt = blk_cnt * lun_nbr;

                                                                /* Max nb of bad blocks per logical unit.               */
    MEM_VAL_COPY_GET_INT16U_LITTLE(&(p_part_data->MaxBadBlkCnt), &FS_NAND_PartONFI_ParamPg[103]);
    p_part_data->MaxBadBlkCnt *= lun_nbr;

                                                                /* Max programming operations per block.                */
    value          = FS_NAND_PartONFI_ParamPg[105];
    multiplier     = FS_NAND_PartONFI_ParamPg[106];
    if (multiplier > 9u) {
        FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse: Max blk erase count larger than supported.rn"));
       *p_err = FS_ERR_DEV_INCOMPATIBLE_LOW_PARAMS;
        return;
    }
    max_blk_erase     = value * FS_NAND_PartONFI_PowerOf10[multiplier];
    max_size          = (CPU_INT32U) - 1;
    if (max_blk_erase > max_size) {
        FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse(): Max blk erase cnt does not fit in container type CPU_INT32U.rn"));
       *p_err = FS_ERR_DEV_INCOMPATIBLE_LOW_PARAMS;
        return;
    }
    p_part_data->MaxBlkErase = max_blk_erase;

                                                                /* Max nb of partial page programming.                  */
    p_part_data->NbrPgmPerPg = FS_NAND_PartONFI_ParamPg[110];

                                                                /* ECC correction needed.                               */
    p_part_data->ECC_NbrCorrBits = FS_NAND_PartONFI_ParamPg[112];
    if (p_part_data->ECC_NbrCorrBits == 0xFFu) {

        p_part_data->ECC_CodewordSize = 0u;
        if (has_ext_pp == DEF_FALSE) {
            FS_TRACE_DBG(("FS_NAND_PartONFI_ParamPageParse(): ECC located in extended param pg, but dev does not have one.rn"));
           *p_err = FS_ERR_DEV_INVALID;
            return;
        } else {
           *p_err = FS_ERR_DEV_NAND_ONFI_EXT_PARAM_PAGE;
        }

    } else {
        p_part_data->ECC_CodewordSize = 528u;
    }

                                                                /* Factory defect mark type.                            */
    if (version >= FS_NAND_PART_ONFI_V21) {
        p_part_data->DefectMarkType = DEFECT_SPARE_L_1_PG_1_OR_N_ALL_0;
    } else {
                                                                /* #### NAND drv not compatible with 'any loc'.         */
        p_part_data->DefectMarkType = DEFECT_SPARE_L_1_PG_1_OR_N_ALL_0;
    }
}

六.參考

https://www.onfi.org/specifications

最新版本是5.1

補(bǔ)充其中的CRC算法

static uint16_t const crc16_table[256] = {
0x0000, 0x8005, 0x800F, 0x000A, 0x801B, 0x001E, 0x0014, 0x8011,
0x8033, 0x0036, 0x003C, 0x8039, 0x0028, 0x802D, 0x8027, 0x0022,
0x8063, 0x0066, 0x006C, 0x8069, 0x0078, 0x807D, 0x8077, 0x0072,
0x0050, 0x8055, 0x805F, 0x005A, 0x804B, 0x004E, 0x0044, 0x8041,
0x80C3, 0x00C6, 0x00CC, 0x80C9, 0x00D8, 0x80DD, 0x80D7, 0x00D2,
0x00F0, 0x80F5, 0x80FF, 0x00FA, 0x80EB, 0x00EE, 0x00E4, 0x80E1,
0x00A0, 0x80A5, 0x80AF, 0x00AA, 0x80BB, 0x00BE, 0x00B4, 0x80B1,
0x8093, 0x0096, 0x009C, 0x8099, 0x0088, 0x808D, 0x8087, 0x0082,
0x8183, 0x0186, 0x018C, 0x8189, 0x0198, 0x819D, 0x8197, 0x0192,
0x01B0, 0x81B5, 0x81BF, 0x01BA, 0x81AB, 0x01AE, 0x01A4, 0x81A1,
0x01E0, 0x81E5, 0x81EF, 0x01EA, 0x81FB, 0x01FE, 0x01F4, 0x81F1,
0x81D3, 0x01D6, 0x01DC, 0x81D9, 0x01C8, 0x81CD, 0x81C7, 0x01C2,
0x0140, 0x8145, 0x814F, 0x014A, 0x815B, 0x015E, 0x0154, 0x8151,
0x8173, 0x0176, 0x017C, 0x8179, 0x0168, 0x816D, 0x8167, 0x0162,
0x8123, 0x0126, 0x012C, 0x8129, 0x0138, 0x813D, 0x8137, 0x0132,
0x0110, 0x8115, 0x811F, 0x011A, 0x810B, 0x010E, 0x0104, 0x8101,
0x8303, 0x0306, 0x030C, 0x8309, 0x0318, 0x831D, 0x8317, 0x0312,
0x0330, 0x8335, 0x833F, 0x033A, 0x832B, 0x032E, 0x0324, 0x8321,
0x0360, 0x8365, 0x836F, 0x036A, 0x837B, 0x037E, 0x0374, 0x8371,
0x8353, 0x0356, 0x035C, 0x8359, 0x0348, 0x834D, 0x8347, 0x0342,
0x03C0, 0x83C5, 0x83CF, 0x03CA, 0x83DB, 0x03DE, 0x03D4, 0x83D1,
0x83F3, 0x03F6, 0x03FC, 0x83F9, 0x03E8, 0x83ED, 0x83E7, 0x03E2,
0x83A3, 0x03A6, 0x03AC, 0x83A9, 0x03B8, 0x83BD, 0x83B7, 0x03B2,
0x0390, 0x8395, 0x839F, 0x039A, 0x838B, 0x038E, 0x0384, 0x8381,
0x0280, 0x8285, 0x828F, 0x028A, 0x829B, 0x029E, 0x0294, 0x8291,
0x82B3, 0x02B6, 0x02BC, 0x82B9, 0x02A8, 0x82AD, 0x82A7, 0x02A2,
0x82E3, 0x02E6, 0x02EC, 0x82E9, 0x02F8, 0x82FD, 0x82F7, 0x02F2,
0x02D0, 0x82D5, 0x82DF, 0x02DA, 0x82CB, 0x02CE, 0x02C4, 0x82C1,
0x8243, 0x0246, 0x024C, 0x8249, 0x0258, 0x825D, 0x8257, 0x0252,
0x0270, 0x8275, 0x827F, 0x027A, 0x826B, 0x026E, 0x0264, 0x8261,
0x0220, 0x8225, 0x822F, 0x022A, 0x823B, 0x023E, 0x0234, 0x8231,
0x8213, 0x0216, 0x021C, 0x8219, 0x0208, 0x820D, 0x8207, 0x0202
};

uint16_t onfi_crc(uint8_t* buffer, uint32_t len)
{
    /* G(X) = X^16 + X^15 +X^2 + 1， 8005H 
     * 初始值 4F4Eh
     * 無XOR,無輸出翻轉(zhuǎn)
     */
    uint16_t crc = 0x4F4E;
	while (len--)
		crc = (crc > 8) ^ *buffer++) & 0x00FF];
	return crc;
}
 

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