模擬乘法器：The Analog Multiplier

A simple embodiment of the analog multiplier is shown in Figure 24. This circuit circumvents many of the problems associated with the log-antilog circuit and provides three quadrant analog multiplication which is relatively temperature insensitive and which is not subject to the bias current errors which plague most multipliers.
Circuit operation may be understood by considering A2 as a controlled gain amplifier, amplifying V2, whose gain is dependent on the ratio of the resistance of PC2 to R5 and by considering A1 as a control amplifier which establishes the resistance of PC2 as a function of V 1. In this way it is seen that VOUT is a function of both V1 and V2.
A1, the control amplifier, provides drive for the lamp, L1. When an input voltage, V1, is present, L1 is driven by A1 until the current to the summing junction from the negative supply through PC1 is equal to the current to the summing junction from V1 through R1. Since the negative supply voltage is fixed, this forces the resistance of PC1 to a value proportional to R1 and to the ratio of V1 to V -. L1 also illuminates PC2 and, if the photoconductors are matched, causes PC2 to have a resistance equal to PC1.
A2, the controlled gain amplifier, acts as an inverting amplifier whose gain is equal to the ratio of the resistance of PC2 to R5. If R5 is chosen equal to the product of R1 and V-, then VOUT becomes simply the product of V1 and V2. R5 may be scaled in powers of ten to provide any required output scale factor.
PC1 and PC2 should be matched for best tracking over temperature since the T.C. of resistance is related to resistance match for cells of the same geometry. Small mismatches may be compensated by varying the value of R5 as a scale factor adjustment. The photoconductive cells should receive equal illumination from L1, a convenient method is to mount the cells in holes in an aluminum block and to mount the lamp midway between them. This mounting method provides controlled spacing and also provides a thermal bridge between the two cells to reduce differences in cell temperature. This technique may be extended to the use of FET’s or other devices to meet special resistance or environment requirements.
The circuit as shown gives an inverting output whose magnitude is equal to one-tenth the product of the two analog inputs. Input V 1 is restricted to positive values, but V2 may assume both positive and negative values. This circuit is restricted to low frequency operation by the lamp time constant.

R2 and R4 are chosen to minimize errors due to input offset current as outlined in the section describing the photocell amplifier. R3 is included to reduce in-rush current when first turning on the lamp, L1.

圖24給出了一個簡單的模擬乘法器電路。這個電路不但克服了對數-反對數方式實現乘法的缺陷，而且可以實現不受溫度變化影響的3象限乘法運算。絕大多數的乘法器都存在偏置電流誤差的困擾，本電路解決了這個問題。
為便于理解本電路的原理，可以將A2視為一個增益受A1控制的放大器，A1在PC2的阻值與V1之間建立起函數關系，A2對V2進行放大，其增益由PC2和R5的阻值之比決定。因此，VOUT是V1和V2的函數。
控制方放大器A1，驅動燈泡L1。輸入電壓V1時，A1輸出升高，使L1逐漸變亮。當求和節點上，經PC1流回負電源的電流與V1經R1流入求和節點的電流相等時，L1亮度不再變化。因為負電源電壓恒定，所以PC1的電阻等于-R1V-/V1。L1發出的光同時照射PC2，如果兩個光敏電阻參數匹配，那么PC2的阻值就會等于PC1。
受控方放大器A2相當于一個增益受控制的反相放大器，其增益為-R5/PC2。如果讓R5的阻值等于R1V-，那么VOUT就等于V1V2。R5的阻值是乘法運算的比例系數，可以任意設定以實現任意大小的輸出，比如設置為10的冪。

PC1和PC2的溫度特性應該匹配，這就要求其具有相同的幾何尺寸，以保證其T.C.特性。在失配程度比較小時，可以通過改變R5的大小進行補償。L1照射到兩個光敏電阻上的光強度應該相等，有一個簡便的方法可以實現這個要求，將兩個光敏電阻固定在同一個鋁塊上的兩個小孔內，燈泡則固定在兩個光敏電阻的中間。采用這個方法，光敏電阻與燈泡的間距是可調的，另外，鋁塊在兩個光敏電阻之間起了平衡溫度的作用，使得其溫度差減小。這個方法也可以推廣到FET對管或者其他需要性能匹配的場合，滿足電阻或者環境方面的特殊要求。
圖示電路的輸出等于兩個輸入電壓的乘積除以10，相位相反。輸入電壓V1必須大于零，V2既可以為正也可以為負。受燈泡的時間常數限制，本電路只能低頻工作。
R2和R4用來降低因輸入失調電流產生的誤差，其原理與前文光電二極管放大器所述一致。R3用于抑制燈泡L1初次通電時的浪涌電流。