TI公司的TPS65987D是單獨使用的USB Type-C和PD控制器,提供了電纜插頭和定向檢測,是全集成USB供電(USB-PD)管理器件,包括USB-PD控制器,電纜插頭和取向檢測電路,電源開關,電源管理電路以及數字核等五部分.它通過電纜和在電纜另以端的另外USB Type-C和PD設備進行通信,集成端口電源開關,控制外部大電流端口電源開關和協商不同模式,還能經由GPIO或I2C控制超高速復接器,以支持USB3.0/3.1數據速率和DisplayPort視頻.主要用在筆記本電腦,平板電腦和超極本(Ultrabook),塢站系統,DisplayPort和Thunderbolt?系統.本文介紹了TPS65987D主要特性和功能框圖,應用案例電路以及評估板USB-C-PD-DUO-EVM主要特性,電路圖,材料清單和PCB設計圖.

The TPS65987D is a stand-alone USB Type-C andPower Delivery (PD) controller providing cable plugand orientation detection for a single USB Type-Cconnector. Upon cable detection, the TPS65987Dcommunicates on the CC wire using the USB PDprotocol. When cable detection and USB PDnegotiation are complete, the TPS65987D enablesthe appropriate power path and configures alternatemode settings for external multiplexers.

The TPS65987D is a fully-integrated USB Power Delivery (USB-PD) management device providing cable plugand orientation detection for a USB Type-C and PD plug or receptacles. The TPS65987D communicates with thecable and another USB Type-C and PD device at the opposite end of the cable, enables integrated port powerswitch, controls an external high current port power switch, and negotiates alternate modes. The TPS65987Dmay also control an attached super-speed multiplexer via GPIO or I2C to simultaneously support USB3.0/3.1data rates and DisplayPort video.

The TPS65987D is divided into five main sections: the USB-PD controller, the cable plug and orientationdetection circuitry, the port power switches, the power management circuitry, and the digital core.

The USB-PD controller provides the physical layer (PHY) functionality of the USB-PD protocol. The USB-PD datais output through either the C_CC1 pin or the C_CC2 pin, depending on the orientation of the reversible USBType-C cable. For a high-level block diagram of the USB-PD physical layer, a description of its features andmore detailed circuitry, see the USB-PD Physical Layer section.

The cable plug and orientation detection analog circuitry automatically detects a USB Type-C cable plug insertionand also automatically detects the cable orientation. For a high-level block diagram of cable plug and orientationdetection, a description of its features and more detailed circuitry, see the Cable Plug and Orientation Detection section.

The port power switches provide power to the system port through the VBUS pin and also through the C_CC1 orC_CC2 pins based on the detected plug orientation. For a high-level block diagram of the port power switches, adescription of its features and more detailed circuitry, see the Port Power Switches section.

The power management circuitry receives and provides power to the TPS65987D internal circuitry and to theLDO_3V3 output. For a high-level block diagram of the power management circuitry, a description of its featuresand more detailed circuitry, see the Power Management section.

The digital core provides the engine for receiving, processing, and sending all USB-PD packets as well ashandling control of all other TPS65987D functionality. A portion of the digital core contains ROM memory whichcontains all the necessary firmware required to execute Type-C and PD applications. In addition, a section of theROM, called boot code, is capable of initializing the TPS65987D, loading of device configuration information, and loading any code patches into volatile memory in the digital core. For a high-level block diagram of the digitalcore, a description of its features and more detailed circuitry, see the Digital Core section.

The TPS65987D is an I2C slave to be controlled by a host processor (see the I2C Interfaces section), and an SPImaster to write to and read from an optional external flash memory (see the SPI Master Interface section).

The TPS65987D also integrates a thermal shutdown mechanism (see Thermal Shutdown section) and runs off ofaccurate clocks provided by the integrated oscillators (see the Oscillators section).

TPS65987D主要特性:

1? USB Power Delivery (PD) Controller
– USB PD 3.0 Compliant
– Fast Role Swap Support
– Physical Layer and Policy Engine
– Configurable at Boot and Host-Controlled
? USB Type-C Specification Compliant
– Cable Attach and Orientation Detection
– Default, 1.5 A, or 3 A Power Advertisement
– Up to 600-mA VConn Current
? Port Power Switch
– Two 5 V to 20 V, 5-A Bidirectional Switches toor from VBUS
– Up to 10-A Adjustable Current Limiting
– Ideal Diode Reverse Current Protection
– Undervoltage, and Overvoltage Protection
– Slew Rate Control
– 5-V, 600-mA VConn Source
? BC1.2 Support
– Advertisement as DCP and CDP
– Automatic DCP Modes Selection:
– Shorted Mode per BC1.2 and YD/T 1591-2009
– 2.7-V Divider 3 Mode
– 1.2-V Mode
– Data Contact Detect
– Primary and Secondary Detection
? I2C Master Write Control for Alt Mode Muxes andVariable DCDCs
? Alternate Mode Support
– DisplayPort
– Thunderbolt?
? Power Management
– Power Supply from 3.3 V or VBUS Source
– 3.3-V LDO Output for Dead Battery Support
? 7-mm × 7-mm QFN Package
– 0.4-mm Pitch
– 56 Pin

TPS65987D應用:

? Notebook Computers
? Docking Systems
? Tablets and Ultrabooks
? DisplayPort, and Thunderbolt? Systems

圖1.TPS65987D簡化電路

圖2.TPS65987D功能框圖

圖3.TPS65987D案例電路

評估板USB-C-PD-DUO-EVM

The USB-C-PD-DUO-EVM allows the TPS65987D to enter Power DUO mode where both VBUS PowerPaths are enabled in parallel to allow for half the effective RDSon. The USB-C-PD-DUO-EVM containsboth a Source side and Sink side board to allow users to evaluate Power DUO mode for either a source orsink design. The USB-C-PD-DUO-EVM also allows users to select both the source and sink capabilitiesoffered through the use of the push button switches labeled 5 V, 9 V, 15 V, and 20 V respectively.

圖4.評估板USB-C-PD-DUO-EVM外形圖

圖5.評估板USB-C-PD-DUO-EVM電路圖:電源

圖6.評估板USB-C-PD-DUO-EVM電路圖:源PD控制器

圖7.評估板USB-C-PD-DUO-EVM電路圖:旁路電源通路

圖8.評估板USB-C-PD-DUO-EVM電路圖:源Type-C連接器

圖9.評估板USB-C-PD-DUO-EVM電路圖:沉PD控制器

圖10.評估板USB-C-PD-DUO-EVM電路圖:FTDI

圖11.評估板USB-C-PD-DUO-EVM電路圖:沉按扭和LED
評估板USB-C-PD-DUO-EVM材料清單:

圖12.評估板USB-C-PD-DUO-EVM PCB設計圖:左:頂層綜合;右:頂層焊接

圖13.評估板USB-C-PD-DUO-EVM PCB設計圖:左:頂層;右:地面1

圖14.評估板USB-C-PD-DUO-EVM PCB設計圖:左:高速;右:地面2

圖15.評估板USB-C-PD-DUO-EVM PCB設計圖:左:電源1;右:電源2S

圖16.評估板USB-C-PD-DUO-EVM PCB設計圖:左:地面3;右:底層

圖17.評估板USB-C-PD-DUO-EVM PCB設計圖:左:底層焊接;右:底層綜合
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