| Sample rate (Max) (MSPS) | 200 |
| Resolution (Bits) | 8 |
| Number of input channels | 1 |
| Interface type | Parallel CMOS, TTL |
| Analog input BW (MHz) | 500 |
| Features | Low Power |
| Rating | Catalog |
| Input range (Vp-p) | 1.6 |
| Power consumption (Typ) (mW) | 210 |
| Architecture | Pipeline |
| SNR (dB) | 47 |
| ENOB (Bits) | 7.5 |
| SFDR (dB) | 60 |
| Operating temperature range (C) | -40 to 85 |
| Input buffer | No |
- Single-Ended Input
- Internal Sample-and-Hold Function
- Low Voltage (Single +3V) Operation
- Small Package
- Power-Down Feature
Key Specifications
- Resolution 8 Bits
- Maximum sampling frequency 200 Msps (min)
- DNL ±0.4 LSB (typ)
- ENOB (fIN = 50 MHz) 7.3 bits (typ)
- THD (fIN = 50 MHz) 61 dB (typ)
- Power Consumption
- Operating 1.05 mW/Msps (typ)
- Power Down 1 mW (typ)
All trademarks are the property of their respective owners.
The ADC08200 is a low-power, 8-bit, monolithic analog-to-digital converter with an on-chip track-and-hold circuit. Optimized for low cost, low power, small size and ease of use, this product operates at conversion rates up to 230 Msps while consuming just 1.05 mW per MHz of clock frequency, or 210 mW at 200 Msps. Raising the PD pin puts the ADC08200 into a Power Down mode where it consumes about 1 mW.
The unique architecture achieves 7.3 Effective Bits with 50 MHz input frequency. The ADC08200 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08200's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 3V or 2.5V logic. The digital inputs (CLK and PD) are TTL/CMOS compatible. The output data format is straight binary.
The ADC08200 is offered in a 24-lead TSSOP package and, while specified over the industrial temperature range of ?40°C to +85°C, it will function over the to ?40°C to +105°C temperature range.
