--- 產(chǎn)品詳情 ---
Technology Family | LVC |
Supply voltage (Min) (V) | 1.65 |
Supply voltage (Max) (V) | 3.6 |
Number of channels (#) | 16 |
IOL (Max) (mA) | 24 |
ICC (Max) (uA) | 20 |
IOH (Max) (mA) | -24 |
Input type | Standard CMOS |
Output type | 3-State |
Features | Balanced outputs, Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs |
Rating | Automotive |
- Qualification in Accordance With AEC-Q100(1)
- Qualified for Automotive Applications
- Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- Member of the Texas Instruments Widebus? Family
- Operates From 1.65 V to 3.6 V
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.1 ns at 3.3 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
- Ioff Supports Partial-Power-Down Mode Operation
- Supports Mixed-Mode Signal Operation On All Ports (5-V Input/Output Voltage With 3.3-V VCC)
- Latch-Up Performance Exceeds 100 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 1000-V Charged-Device Model (C101)
Contact factory for details. Q100 qualification data available on request.
Widebus is a trademark of Texas Instruments.
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC16244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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