| Technology Family | AC |
| Supply voltage (Min) (V) | 3 |
| Supply voltage (Max) (V) | 5.5 |
| Number of channels (#) | 8 |
| IOL (Max) (mA) | 24 |
| ICC (Max) (uA) | 80 |
| IOH (Max) (mA) | -24 |
| Input type | Standard CMOS |
| Output type | 3-State |
| Features | Balanced outputs, Very high speed (tpd 5-10ns), Input clamp diode |
| Rating | Catalog |
- EPICTM (Enhanced-Performance Implanted CMOS ) 1-um Process
- 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
- Flow-Through Architecture Optimizes PCB Layout
- Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
- 500-mA Typical Latch-Up Immunity at 125°C
- Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic DIPs (NT)
EPIC is a trademark of Texas Instruments Incorporated.
The 74AC11244 is an octal buffer or line driver designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as two 4-bit buffers or one 8-bit buffer, with active-low output-enable (OE\) inputs.
When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The 74AC11244 is characterized for operation from -40°C to 85°C.
