--- 產品詳情 ---
Technology Family | FCT |
Supply voltage (Min) (V) | 4.5 |
Supply voltage (Max) (V) | 5.5 |
Number of channels (#) | 16 |
IOL (Max) (mA) | 64 |
ICC (Max) (uA) | 500 |
IOH (Max) (mA) | -32 |
Input type | TTL-Compatible CMOS |
Output type | 3-State |
Features | Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs |
Rating | Catalog |
- Ioff supports partial-power-down mode operation
- Edge-rate control circuitry for significantly improved noise characteristics
- Typical output skew < 250 ps
- ESD > 2000V
- TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
- Industrial temperature range of \x9640°C to +85°C
- VCC = 5V ± 10%
- CY74FCT16244T Features:
- 64 mA sink current, 32 mA source current
- Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
- CY74FCT162244T Features:
- Balanced output drivers: 24 mA
- Reduced system switching noise
- Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C
- CY74FCT162H244T Features:
- Bus hold on data inputs
- Eliminates the need for external pull-up or pull-down resistors
These 16-bit buffers/line drivers are designed for use in memory driver, clock driver, or other bus interface applications, where high-speed and low power are required. With flow-through pinout and small shrink packaging board layout is simplified. The three-state controls are designed to allow 4-bit, 8-bit or combined 16-bit operation.
This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
The CY74FCT16244T is ideally suited for driving high-capacitance loads and low-impedance backplanes.
The CY74FCT162244T has 24-mA balanced output drivers with current limiting resistors in the outputs. This reduces the need for external terminating resistors and provides for minimal undershoot and reduced ground bounce. The CY74FCT162244T is ideal for driving transmission lines.
The CY74FCT162H244T is a 24-mA balanced output part that has "bus hold" on the data inputs. The device retains the input\x92s last state whenever the input goes to high impedance. This eliminates the need for pull-up/down resistors and prevents floating inputs.
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