| Arm CPU | 2 Arm Cortex-A15 |
| Arm MHz (Max.) | 1500, 1176, 750, 650, 500 |
| Co-processor(s) | 4 Arm Cortex-M4 |
| CPU | 32-bit |
| Graphics acceleration | 1 2D, 2 3D |
| Display type | 1 HDMI, 3 LCD |
| Protocols | Ethernet |
| Ethernet MAC | 2-Port 1Gb switch |
| PCIe | 2 PCIe Gen 3 |
| Hardware accelerators | 1 Image Subsystem Processor, 1 Image Video Accelerator, 2 Embedded Vision Engines (EVE) |
| Features | Vision Analytics |
| Operating system | Android, Linux, RTOS |
| Security | Cryptography, Debug security, Device identity, Isolation firewalls, Secure boot, Secure storage & programming, Software IP protection |
| Rating | Automotive |
| Operating temperature range (C) | -40 to 125 |
TI 的全新 TDA2Px 片上系統 (SoC) 是經過高度優化的可擴展系列器件，專為滿足領先的高級駕駛輔助系統 (ADAS) 的要求而設計。TDA2Px 系列集最佳的性能、低功耗和 ADAS 視覺分析處理功能于一體，可廣泛應用于汽車領域中的 ADAS 應用， 以推動實現更自主的無碰撞駕駛體驗。
TDA2Px SoC 通過最全面的 ADAS 應用 （包括前置攝像頭、泊車輔助、環視和單一架構上的傳感器融合），在汽車領域實現了復雜的嵌入式視覺技術。
TDA2Px SoC 采用異類可擴展架構，包含 TI 的定點和浮點 TMS320C66x 數字信號處理器 (DSP) 生成內核、Vision AccelerationPac、Arm Cortex-A15 MPCore? 和雙 Cortex-M4 處理器的組合。該器件集成了用于在以太網 AVB 網絡上解碼多視頻流的視頻加速器，以及用于渲染虛擬視圖的圖形加速器，因此可實現 3D 視覺體驗。此外，TDA2Px SoC 還集成了諸多外設，包括 LVDS 環視系統的多攝像頭接口（并行和串行）、顯示屏、CAN 和千兆位以太網 AVB。
適用于本系列產品的 Vision AccelerationPac 包含多個嵌入式視覺引擎 (EVE)，因此應用處理器不用再執行視覺分析功能，同時還降低了功耗。Vision AccelerationPac 針對視覺處理功能進行了優化，具有用于高效程序執行的 32 位 RISC 內核，以及用于專業視覺處理的矢量協處理器。
此外，TI 為 Arm、DSP 和 EVE 協處理器提供了一系列完整的開發工具，其中包括 C 語言編譯器、用于簡化編程和調度的 DSP 匯編優化器、可查看源代碼執行情況的調試界面等。
每個器件都具有加密加速特性。HS（高安全性）器件上還提供支持的所有其他安全 特性，包括安全引導支持、調試安全性和可信執行環境支持。有關 HS 器件的更多信息，請聯系您的 TI 代表。
TDA2Px ADAS 處理器符合 AEC-Q100 標準。
TI’s new TDA2Px System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Px family enables broad ADAS applications in automobiles by integrating an optimal mix of performance, low power and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.
The TDA2Px SoC enables sophisticated embedded vision technology in automobiles by broadest range of ADAS applications including front camera, park assist, surround view and sensor fusion on a single architecture.
The TDA2Px SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation cores, Vision AccelerationPac, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerators for rendering virtual views, enable a 3D viewing experience. And the TDA2Px SoC also integrates a host of peripherals including multi-camera interfaces (both parallel and serial) for LVDS-based surround view systems, displays, CAN and GigB Ethernet AVB.
The Vision AccelerationPac for this family of products includes multiple embedded vision engines (EVEs) offloading the vision analytics functionality from the application processor while also reducing the power footprint. The Vision AccelerationPac is optimized for vision processing with a 32-bit RISC core for efficient program execution and a vector coprocessor for specialized vision processing.
Additionally, TI provides a complete set of development tools for the Arm, DSP, and EVE coprocessor, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The TDA2Px ADAS processor is qualified according to the AEC-Q100 standard.
