Cypress公司的S6BP501A／S6BP502A是三路輸出功率管理集成電路,包括一個高壓降壓DC／DC控制器(DD3V),一個內(nèi)置了FET的降壓DC／DC轉(zhuǎn)換器(DD1V)和一個內(nèi)置了FET的升壓DC／DC轉(zhuǎn)換器(DD5V);電流模式架構(gòu)具有快速負載響應(yīng)特性,無負載時輸入電流降至15 μA,輸入電壓寬至2.5V-42V,和AEC-Q100 (Grade-2)兼容.主要用在儀表盤,汽車電子和工業(yè)應(yīng)用.本文介紹了S6BP501A／S6BP502A主要特性,框圖和架構(gòu)圖,應(yīng)用電路及其所用材料清單,以及評估板S6SBP501A00VA1001和S6SBP502A00VA1001主要指標,框圖,電路圖,材料清單和PCB設(shè)計圖.

S6BP501A／S6BP502A is a three channel output power management IC. This IC includes one high voltage buck DC／DC controller(DD3V), one buck DC／DC converter with built-in FETs (DD1V) and one boost DC／DC converter with built-in FETs (DD5V). Currentmode architecture is used for fast load transient response. At no load, the input supply current is reduced to 15 μA (Typ). It is possibleto provide stable output voltage under an automotive cold cranking condition until the input voltage falls to 2.5V. This IC is suitable forpower supply solutions of automotive and Industrial applications. Each output voltage can be adjusted by external resistors. BothDD1V and DD5V support the switching frequencies up to 2.4 MHz to allow use of small size inductors, which can reduce a partmounting area. To decrease EMI, this IC equips a SYNC function that synchronizes to an external clock signal and a spread spectrumclock generator (SSCG). When not inputting an external clock, it operates by an internal clock. The SSCG is valid both internal clockand external clock. Moreover, this IC has power good (PG) monitors for each output and a thermal-warning indicator.

S6BP501A／S6BP502A主要特性:

? Wide input voltage range : 2.5V to 42V (DD3V)
? Adjustable output voltage with pairs of resistors
? DD1V : 1.0V to 1.3V
? DD3V : 3.2V to 3.4V
? DD5V : 5.0V to 5.2V
? Switching frequency range (synchronizable to external clockby SYNC function)
? DD1V, DD5V
Internal clock operation : 2.1 MHz (Typ)
External clock operation : 1.8 MHz to 2.4 MHz
? DD3V (one-fifth-divided clock)
Internal clock operation : 420 kHz (Typ)
External clock operation : 360 kHz to 480 kHz
? Super-high efficiency by PFM operation (DD3V, DD5V :
When fixing SYNC pin to a low level)
? Automatic PWM／PFM switching and fixed PWM operationsare settable by SYNC pin (DD3V, DD5V)
? Operable on up to 100% duty (DD3V)
? Built-in phase compensators
? Built-in SSCG(spread spectrum clock generator)
? Synchronous rectification current mode architecture
? Shutdown current : 1 μA (Typ)
? Quiescent current : 15 μA (Typ)
? Load-independent soft-start
? Power good monitors for each output
? OVD (over voltage detection)
? UVD (under voltage detection)
? Enhanced protection functions
? UVLO (under voltage lockout)
? OVP (over voltage protection)
? OCP (over current protection)
? TSD (thermal shutdown)
? TWI (thermal warning indicator)
? Wettable QFN-32 package : 5 mm × 5 mm
? AEC-Q100 compliant (Grade-2)

S6BP501A／S6BP502A應(yīng)用:

? Instrument cluster
? Automotive applications
? Industrial applications

圖1.S6BP501A／S6BP502A框圖

圖2.S6BP501A／S6BP502A架構(gòu)圖

圖3.S6BP501A／S6BP502A應(yīng)用電路
圖3S6BP501A／S6BP502A應(yīng)用電路材料清單:

評估板S6SBP501A00VA1001和S6SBP502A00VA1001

S6SBP501A00VA1001 and S6SBP502A00VA1001 are evaluation kits for the power block of an automotive instrumentcluster. These boards implement the Cypress power management IC S6BP501A and S6BP502A respectively.

圖4.評估板S6SBP501A00VA1001和S6SBP502A00VA1001外形圖

圖5.評估板S6SBP501A00VA1001和S6SBP502A00VA1001框圖
評估板S6SBP501A00VA1001和S6SBP502A00VA1001主要指標:

圖6.評估板S6SBP501A00VA1001和S6SBP502A00VA1001電路圖
評估板S6SBP501A00VA1001和S6SBP502A00VA1001材料清單:

圖7.評估板S6SBP501A00VA1001和S6SBP502A00VA1001 PCB設(shè)計圖(1)

圖8.評估板S6SBP501A00VA1001和S6SBP502A00VA1001 PCB設(shè)計圖(2)

圖9.評估板S6SBP501A00VA1001和S6SBP502A00VA1001 PCB設(shè)計圖(3)
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