色哟哟视频在线观看-色哟哟视频在线-色哟哟欧美15最新在线-色哟哟免费在线观看-国产l精品国产亚洲区在线观看-国产l精品国产亚洲区久久

電子發燒友App

硬聲App

0
  • 聊天消息
  • 系統消息
  • 評論與回復
登錄后你可以
  • 下載海量資料
  • 學習在線課程
  • 觀看技術視頻
  • 寫文章/發帖/加入社區
會員中心
創作中心

完善資料讓更多小伙伴認識你,還能領取20積分哦,立即完善>

3天內不再提示
電子發燒友網>電子資料下載>電子書籍>路線圖正式產權核查

路線圖正式產權核查

2009-07-18 | rar | 2150 | 次下載 | 免費

資料介紹

What is formal property verification? A natural language such as English allows
us to interpret the term formal property verification in two ways, namely:
• Verification of formal properties, or
• Formal methods for property verification
This inherent ambiguity in natural languages has been the source of many
logical bugs in chip designs. Design specifications are sometimes interpreted
in different ways by different designers with the result that the design’s architectural
intent is not implemented correctly. In an era where bugs are more
costly than transistors, the industry is beginning to realize the value of using
formal specifications.
In practice there are indeed two ways in which property verification is
done today. These are static Assertion-based Verification (ABV) and dynamic
Assertion-based Verification (ABV). In both forms, formal properties specify
the correctness requirements of the design, and the goal is to check whether a
given implementation satisfies the properties. Static ABV techniques formally
verify whether all possible behaviors of the design satisfy the given properties.
Dynamic ABV is a simulation-based approach, where the properties are
checked over a simulation run – the verification is thereby confined to only
those behaviors that are encountered during the simulation. In this book, we
shall refer to static ABV as formal property verification (FPV), and continue
to use dynamic ABV to refer to the simulation based property verification
approach.
The main tasks for a practitioner of property verification are as follows:
1. Development of the formal property specification. The main challenge here
is to express key features of the design intent in terms of formal properties.
2. Verifying the consistency and completeness of the specification. This is a
necessary step, because the first task is a non-trivial one and subject to
errors and oversights.
3. Verifying the implementation against the formal property specification. In
order to perform this task effectively, a verification engineer must be aware
of the limitations of the verification tool and must know the best way to
use the tool under various types of constraints.
All the above tasks are replete with open issues – the focus of this book is to
consider some of these issues and attempt to forecast the roadmap for FPV
and dynamic ABV within the existing design verification flows of chip design
companies. This chapter will summarize some of the major challenges. Let us
use the following case as a running example for our discussion.
Example 1.1. Let us consider the specification of a 2-way priority arbiter having
the following interface:
mem-arbiter( input r1, r2, clk, output g1, g2 )
r1 and r2 are the request lines, g1 and g2 are the corresponding grant lines,
and clk is the clock on which the arbiter samples its inputs and performs the
arbitration.We assume that the arbitration decision for the inputs at one cycle
is reflected by the status of the grant lines in the next cycle. Let us suppose
that the specification of the arbiter contains the following requirements:
1. Request line r1 has higher priority than request line r2. Whenever r1 goes
high, the grant line g1 must be asserted for the next two cycles.
2. When none of the request lines are high, the arbiter parks the grant on
g2 in the next cycle.
3. The grant lines, g1 and g2, are mutually exclusive.
It is difficult to locate a book on formal verification that does not have an
arbiter example - we hereby follow the tradition!

下載該資料的人也在下載 下載該資料的人還在閱讀
更多 >

評論

查看更多

下載排行

本周

  1. 1電子電路原理第七版PDF電子教材免費下載
  2. 0.00 MB  |  1490次下載  |  免費
  3. 2單片機典型實例介紹
  4. 18.19 MB  |  92次下載  |  1 積分
  5. 3S7-200PLC編程實例詳細資料
  6. 1.17 MB  |  27次下載  |  1 積分
  7. 4筆記本電腦主板的元件識別和講解說明
  8. 4.28 MB  |  18次下載  |  4 積分
  9. 5開關電源原理及各功能電路詳解
  10. 0.38 MB  |  10次下載  |  免費
  11. 6基于AT89C2051/4051單片機編程器的實驗
  12. 0.11 MB  |  4次下載  |  免費
  13. 7藍牙設備在嵌入式領域的廣泛應用
  14. 0.63 MB  |  3次下載  |  免費
  15. 89天練會電子電路識圖
  16. 5.91 MB  |  3次下載  |  免費

本月

  1. 1OrCAD10.5下載OrCAD10.5中文版軟件
  2. 0.00 MB  |  234313次下載  |  免費
  3. 2PADS 9.0 2009最新版 -下載
  4. 0.00 MB  |  66304次下載  |  免費
  5. 3protel99下載protel99軟件下載(中文版)
  6. 0.00 MB  |  51209次下載  |  免費
  7. 4LabView 8.0 專業版下載 (3CD完整版)
  8. 0.00 MB  |  51043次下載  |  免費
  9. 5555集成電路應用800例(新編版)
  10. 0.00 MB  |  33562次下載  |  免費
  11. 6接口電路圖大全
  12. 未知  |  30320次下載  |  免費
  13. 7Multisim 10下載Multisim 10 中文版
  14. 0.00 MB  |  28588次下載  |  免費
  15. 8開關電源設計實例指南
  16. 未知  |  21539次下載  |  免費

總榜

  1. 1matlab軟件下載入口
  2. 未知  |  935053次下載  |  免費
  3. 2protel99se軟件下載(可英文版轉中文版)
  4. 78.1 MB  |  537791次下載  |  免費
  5. 3MATLAB 7.1 下載 (含軟件介紹)
  6. 未知  |  420026次下載  |  免費
  7. 4OrCAD10.5下載OrCAD10.5中文版軟件
  8. 0.00 MB  |  234313次下載  |  免費
  9. 5Altium DXP2002下載入口
  10. 未知  |  233045次下載  |  免費
  11. 6電路仿真軟件multisim 10.0免費下載
  12. 340992  |  191183次下載  |  免費
  13. 7十天學會AVR單片機與C語言視頻教程 下載
  14. 158M  |  183277次下載  |  免費
  15. 8proe5.0野火版下載(中文版免費下載)
  16. 未知  |  138039次下載  |  免費
主站蜘蛛池模板: 狠狠色丁香久久婷婷综合_中| 侮辱丰满美丽的人妻| 在线国产视频观看| 国产呻吟久久久久久久92| 日本浴室日产在线系列| 99热久这里都是精品小草| 两性午夜色视频免费网站| 伊人久久亚洲精品一区| 国色精品VA在线观看免费视频| 少妇的肉体AA片免费观看| 处女座历史名人| 青草国产超碰人人添人人碱 | 久久久高清国产999尤物| 亚洲爆乳无码精品AAA片蜜桃| 囯产精品麻豆巨作久久| 日本妈妈xxxx| 抽插妇女疯狂视频| 色多多深夜福利免费观看| 成人国内精品久久久久影| 日本aa大片| 成年人视频在线免费| 日本妈妈在线观看中文字幕| 成人动漫bt种子| 三级视频网站| 国产99对白在线播放| 肉动漫h黄动漫日本免费观看 | 青青视频国产依人在线| chinese耄耋70老太性| 亲女乱h文小兰第一次| 成人毛片在线播放| 色色色999| 国产精品人成在线播放新网站| 午夜欧洲亚洲AV永久无码精品| 国产精品婷婷五月久久久久| 迅雷成人论坛| 精品福利一区| 曰批国产精品视频免费观看| 美女激清床上戏大全| 99久久精品免费看国产一区二区 | qvod 电影| 肉奴隷 赤坂丽在线播放|