資料介紹
The ADE7756 contains a sampled Waveform register and an
Active Energy register capable of holding at least five seconds of
accumulated power at full load. Data is read from the ADE7756
via the serial interface. The ADE7756 also provides a pulse output
(CF) with a frequency that is proportional to the active power.
In addition to real power information, the ADE7756 also provides
system calibration features, i.e., channel offset correction, phase
calibration, and power calibration. The part also incorporates a
detection circuit for short duration low voltage variations or sags.
The voltage threshold level and the duration (in number of halfline
cycles) of the variation are user programmable. An open drain
logic output (SAG) goes active low when a sag event occurs.
A zero crossing output (ZX) produces an output that is synchronized
to the zero crossing point of the line voltage. This output can
be used to extract timing or frequency information from the line.
The signal is also used internally to the chip in the calibration
mode. This permits faster and more accurate calibration of the
real power calculation. This signal is also useful for synchronization
of relay switching with a voltage zero crossing, thus improving
the relay life by reducing the risk of arcing.
The interrupt request output is an open drain, active low logic
output. The IRQ output will become active when the accumulated
real power register is half-full and also when the register
overflows. A status register indicates the nature of the interrupt.
The ADE7756 is available in 20-lead DIP and 20-lead
SSOP packages.
Active Energy register capable of holding at least five seconds of
accumulated power at full load. Data is read from the ADE7756
via the serial interface. The ADE7756 also provides a pulse output
(CF) with a frequency that is proportional to the active power.
In addition to real power information, the ADE7756 also provides
system calibration features, i.e., channel offset correction, phase
calibration, and power calibration. The part also incorporates a
detection circuit for short duration low voltage variations or sags.
The voltage threshold level and the duration (in number of halfline
cycles) of the variation are user programmable. An open drain
logic output (SAG) goes active low when a sag event occurs.
A zero crossing output (ZX) produces an output that is synchronized
to the zero crossing point of the line voltage. This output can
be used to extract timing or frequency information from the line.
The signal is also used internally to the chip in the calibration
mode. This permits faster and more accurate calibration of the
real power calculation. This signal is also useful for synchronization
of relay switching with a voltage zero crossing, thus improving
the relay life by reducing the risk of arcing.
The interrupt request output is an open drain, active low logic
output. The IRQ output will become active when the accumulated
real power register is half-full and also when the register
overflows. A status register indicates the nature of the interrupt.
The ADE7756 is available in 20-lead DIP and 20-lead
SSOP packages.
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