資料介紹
The LPC47M13x* is a 3.3V (5V tolerant) PC99 compliant Super I/O controller with an LPC interface. It is
functionally identical to the LPC47M10x and is designed to be compatible with other LPC parts, including an
SMSC Super I/O part with Hardware Monitoring capabilities and an SMSC Super I/O part with a USB Hub.
Therefore, the LPC47M13x may be used on a board designed for either of the compatible parts, which affords the
board designer the added advantage of designing for multiple capabilities.
The LPC47M13x implements the LPC interface, a pin reduced ISA bus interface which provides the same or
better performance as the ISA/X-bus with a substantial savings in pins used. This interface makes use of the PCI
clock, which runs at 33MHz instead of the traditional 8MHz for the ISA bus, that eases some complications found
in synchronous designs. In addition, all legacy drivers used for Super I/O components are still supported making
this new interface transparent to the supporting software. The LPC bus also supports power management, such
as wake-up and sleep modes, in the same way as the PCI bus.
The LPC47M13x has incorporated the following Super I/O components: a parallel port that is compatible with IBM
PC/AT architecture, as well as the IEEE 1284 EPP and ECP; two serial ports that are 16C550A UART
compatible; a keyboard/mouse controller that uses an 8042 microcontroller; two floppy disk controllers, which use
SMSC's true CMOS 765B core; two infrared ports that are IrDA 1.0 compliant; a MIDI interface, which is a MPU-
401-compatible; and 37 General Purpose I/O control functions, which offer flexibility to the system designer. The
true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and
register compatible with the 82077AA. This chip also controls two LED’s, a dual game port interface, and the
speed of two fans with fan tachometer inputs through the use of a pulse width modulation scheme.
The LPC47M13x is ACPI 1.0 compatible and therefore supports multiple low power-down modes. It incorporates
sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events.
The LPC47M13x supports the ISA Plug-and-Play Standard (Version 1.0a). The I/O Address, DMA Channel and
hardware IRQ of each logical device in the LPC47M13x may be reprogrammed through the internal configuration
registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels.
The LPC47M13x does not require any external filter components and is therefore easy to use and offers lower
system costs and reduced board area.
functionally identical to the LPC47M10x and is designed to be compatible with other LPC parts, including an
SMSC Super I/O part with Hardware Monitoring capabilities and an SMSC Super I/O part with a USB Hub.
Therefore, the LPC47M13x may be used on a board designed for either of the compatible parts, which affords the
board designer the added advantage of designing for multiple capabilities.
The LPC47M13x implements the LPC interface, a pin reduced ISA bus interface which provides the same or
better performance as the ISA/X-bus with a substantial savings in pins used. This interface makes use of the PCI
clock, which runs at 33MHz instead of the traditional 8MHz for the ISA bus, that eases some complications found
in synchronous designs. In addition, all legacy drivers used for Super I/O components are still supported making
this new interface transparent to the supporting software. The LPC bus also supports power management, such
as wake-up and sleep modes, in the same way as the PCI bus.
The LPC47M13x has incorporated the following Super I/O components: a parallel port that is compatible with IBM
PC/AT architecture, as well as the IEEE 1284 EPP and ECP; two serial ports that are 16C550A UART
compatible; a keyboard/mouse controller that uses an 8042 microcontroller; two floppy disk controllers, which use
SMSC's true CMOS 765B core; two infrared ports that are IrDA 1.0 compliant; a MIDI interface, which is a MPU-
401-compatible; and 37 General Purpose I/O control functions, which offer flexibility to the system designer. The
true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and
register compatible with the 82077AA. This chip also controls two LED’s, a dual game port interface, and the
speed of two fans with fan tachometer inputs through the use of a pulse width modulation scheme.
The LPC47M13x is ACPI 1.0 compatible and therefore supports multiple low power-down modes. It incorporates
sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events.
The LPC47M13x supports the ISA Plug-and-Play Standard (Version 1.0a). The I/O Address, DMA Channel and
hardware IRQ of each logical device in the LPC47M13x may be reprogrammed through the internal configuration
registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels.
The LPC47M13x does not require any external filter components and is therefore easy to use and offers lower
system costs and reduced board area.
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