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電子發(fā)燒友網(wǎng)>電子資料下載>IC datasheet pdf>MAXQ7665C, MAXQ7665D pdf datas

MAXQ7665C, MAXQ7665D pdf datas

2009-01-22 | rar | 555 | 次下載 | 3積分

資料介紹

The MAXQ7665A–MAXQ7665D smart systems-on-a-chip (SoC) are data-acquisition systems based on a microcontroller (μC). As members of the MAXQ? family of 16-bit, reduced instruction set computing (RISC) μCs, the MAXQ7665A–MAXQ7665D are ideal for low-cost, low-power, embedded applications such as automotive, industrial controls, and building automation. The flexible, modular architecture design used in these μCs allows development of targeted products for specific applications with minimal effort.

The MAXQ7665A–MAXQ7665D incorporate a high-performance 16-bit RISC core, a 12-bit 500ksps SAR ADC with a programmable gain amplifier (PGA), and a full CAN 2.0B controller supporting transfer rates up to 1Mbps. These devices include a 12-bit DAC with a buffered voltage output and on-chip oscillator circuitry to operate from an external high frequency (8MHz) crystal. There is also a built-in internal RC oscillator as an alternative to using an external crystal. The MAXQ7665A–MAXQ7665D contain an internal temperature sensor to measure die temperature and a remote temperature-sensor driver. The analog functions and digital I/O are powered from a +5V supply, while the internal digital core is powered from +3.3V, which can be supplied by an on-chip linear regulator. These devices also include a dual power-supply supervisor with reset and a JTAG interface for in-system programming and debugging. The 16-bit RISC μC includes up to 128KB (64K x 16) of flash memory and 512 bytes (256 x 16) of RAM.

The MAXQ7665A–MAXQ7665D are available in a 7mm x 7mm 48-pin TQFN package and are specified to operate from -40°C to +125°C.

  • High-Performance, Low-Power, 16-Bit RISC Core
    • 8MHz Operation, Approaching 1MIPS per MHz
    • Low Power (< 3mA/MIPS, DVDD = +3.3V)
    • 16-Bit Instruction Word, 16-Bit Data Bus
    • 33 Instructions (Most Require Only One Clock Cycle)
    • 16-Level Hardware Stack
    • Three Independent Data Pointers with Automatic Increment/Decrement
  • Program and Data Memory
    • Up to 128KB (64K x 16) Internal Flash
    • 512 Bytes (256 x 16) Internal RAM
  • Smart Analog Peripherals
    • Low-Power, Eight Differential-Channel, 12-Bit, 500ksps ADC
    • Programmable-Gain Amplifier, Software-Selectable Gain:
      • 1V/V, 2V/V, 4V/V, 8V/V, 16V/V, 32V/V
      • 12-Bit DAC with Buffered Voltage Output
    • External References for ADC and DAC
    • Internal (Die) and External Diode Temperature Sensing
  • Timer/Digital I/O Peripherals
    • Full CAN 2.0B Controller
      • 15 Message Centers (256-Byte Dual Port Memory)
      • Programmable Bit Rates from 10kbps to 1Mbps
      • Standard 11-Bit or Extended 29-Bit Identification Modes
      • Two Data Masks and Associated IDs for DeviceNET?, SDS and Other Higher Layer CAN Protocols
      • External Transmit Disable for Autobaud
      • SIESTA Low-Power Mode
      • Wake-Up on CANRXD Edge Transition
    • UART (LIN) with User-Programmable Baud Rate
    • 16 x 16 Hardware Multiplier with 48-Bit Accumulator, Single Clock Cycle Operation
    • Three 16-Bit (or Six 8-Bit) Programmable
      • Timer/Counter/PWM
    • Eight General-Purpose, Digital I/O Pins, with External Interrupt Capability
    • All Interrupts Can Be Used as a Wake-Up
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