The SN54LVC652A octal bus transceiver and register is designed for 2.7-V to 3.6-V V_CC operation, and the SN74LVC652A octal bus transceiver and register is designed for 1.65-V to 3.6-V V_CC operation.

These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers.

Output-enable (OEAB and OEBA\) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.