為提高芯片驗(yàn)證與測(cè)試的可靠性，針對(duì)片上網(wǎng)絡(luò)核心芯片的結(jié)構(gòu)特點(diǎn)，設(shè)計(jì)出一種基于宿主機(jī)/目標(biāo)機(jī)通信模式的測(cè)試系統(tǒng)。重點(diǎn)描述了測(cè)試系統(tǒng)軟硬件的設(shè)計(jì)與實(shí)現(xiàn)，并采用Stratix系列FPGA芯片進(jìn)行原型測(cè)試和驗(yàn)證。實(shí)驗(yàn)結(jié)果表明，該系統(tǒng)可對(duì)芯片的復(fù)位、實(shí)現(xiàn)功能及穩(wěn)定性進(jìn)行全面測(cè)試，而且原理簡(jiǎn)單、操作方便、運(yùn)行穩(wěn)定，極大地提高了芯片測(cè)試的可靠性和速度。

Abstract:

?In order to enhance the reliability of chip’s verification and testing， the article designs a test system of communication model based on host and target machine， for the structural characteristics of the network-on-chip. It focuses on designing and implementation of system’s hardware and software， and uses FPGA chip of Stratix series to test and verify. The experiment results show that this system has simple principle， convenient operation， and stable operation. It can achieve a comprehensive test of chip’s reset， functions and stability， which improves the reliability and speed of chip testing.