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電子發(fā)燒友網(wǎng)>電子資料下載>嵌入式開發(fā)>白皮書:微處理器Cortex A8指南

白皮書:微處理器Cortex A8指南

2017-09-15 | rar | 0.1 MB | 次下載 | 3積分

資料介紹

  The Need

 

  Next-generation digital entertainment and mobile communications devices are driving the need for flexible high-performance processing solutions that can meet the needs of the low-power, cost sensitive markets. Smart phones are becoming the center of your life, combining entertainment, gaming, internet services and seamless connectivity to digital entertainment devices. In a competitive and changing marketplace where digital entertainment and communications devices are converging, the need for a high-performance processor that can meet both the demanding performance requirements of leading-edge consumer entertainment devices and the tight power requirements for advanced mobile products is clear.

  The Sol ution

  The Cortex?-A8 processor is the highest performance, most power-efficient processor ever developed by ARM. With the ability to scale in speed from 600MHz to greater than 1GHz, the Cortex-A8 processor can meet the requirements for power optimized mobile devices with a power budget of less than 300mW and for performance optimized consumer applications requiring 2000 Dhrystone MIPS. The Cortex-A8 processor is ARM’s first superscalar processor featuring NEON? technology for multimedia and signal processing, Jazelle?-RCT (Realtime Compilation Target) technology for efficient support of ahead-of-time and just-in-time compilation of Java and other bytecode languages and Thumb?-2 technology for enhanced code density and performance. The Cortex-A8 processor also supports TrustZone? technology for security and the AMBA 3 AXI bus, making it the next natural step up in performance for next-generation applications.

  Wha t ena bl es it

  The ARM Cortex-A8 processor’s sophisticated pipeline architecture is based on dual, symmetric, in-order issue, 13-stage pipelines with advanced dynamic branch prediction and static scheduling achieving 2.0 DMIPS/MHz.

  NEON media engine operates as a data processing engine attached to the end of the main processor pipeline and is able to process demanding applications such as VGA H.264 30fps video decode with a clock frequency as low as 400MHz. Both the main pipeline and the NEON engine are supported directly by integrated high-performance Level 1 and Level 2 caches that work together to minimize access latency, minimize external bus traffic, and support high bandwidth data streaming to NEON media engine. The Cortex-A8 processor’s

  

  DFT/Test Debug ETM
白皮書:微處理器Cortex A8指南

  

  IFetchIDecodeIExecute Load store

  FlagsALU1

  I-sideL1PrefetchDecode &Dependency LoadL1 cacheD-side

  L1cacheandsequencercheckand ALU2 storeinterfaceL1

  RAMinterface branch issueRegBank RAM

  prediction

  MAC

  TLB TLB

  Level 2Instruction and Data DMA arbitrationNEON unit

  cache NEON Issue and

  Decode NEON load

  instruction forward

  control data queue

  L2 cache and preload engine queue control

  A 8

  NEON NEON

  -

  Floating Load

  ?Fill and eviction queue

  L2 cacheL2 cache Point Store

  X NEON

  data RAMtag RAM RegBank

  E BIUWrite NEON

  T buffer VFPLite

  Integer

  C O R

  

  AXI

  industry-leading performance and power efficiency is enabled by combining advanced technology such as the ARM? Artisan? AdvantageHS library with enhanced design flows supporting pure synthesis, as well as structured, and custom design.

  Eas y to use

  The Cortex-A8 processor, supported by ARM’s complete ecosystem of technology; makes the Cortex-A8 processor easy to use in complex systems. Innovative new products supporting the Cortex-A8 processor include: RealView? SoC Designer (which provides cycle accurate ESL models for architectural exploration), System Generator (which provides fast instruction accurate simulation models for software development), , RealView Development Suite 3.1 with optional Vectorizing Compiler, AMBA? Designer interconnect design tool, CoreSight? debug and trace, RealView Hardware Platforms providing implementations of Cortex-A8 on FPGA for evaluation of the technology and early software development and SoC prototyping. and ARM Artisan AdvantageHS libraries and RAMs.

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