1.0 Introduction..................................................................................................................1
1.1 Interface Suggestions............................................................................................1
1.2 Top Four Issues ....................................................................................................1
2.0 82527 CPU Interface Modes...................................................................................1
3.0 82527 CLOCKING STRUCTURE...........................................................................2
3.1 Double Read Operation.........................................................................................2
4.0 INTERFACING SCHEMATICS FOR MODE 2 ....................................................3
5.0 Timing Considerations.............................................................................................4
5.1 Read Timings ........................................................................................................5
5.2 Write Timings ........................................................................................................6
6.0 C-Program for Initializing the 82527...................................................................7
Figures
1 Interface Scheme ..................................................................................................3
2 82527 CS# Setup Timing Requirements...............................................................4
3 Bus Timing Diagram for a Read Cycle..................................................................5
4 Bus Timing Diagram for a Double-Read Cycle .....................................................5
5 Bus Timing Diagram for a Write Cycle ..................................................................6
Tables
1 Critical Timing........................................................................................................4