資料介紹
Section 2– Configuration, Clocking, Low Power Modes, and
Internal Memory Map
1. SCCE2 Register
In section 2-24, in Table 2-6, the SCCE2 register should be 8 bits wide, not 16 bits as shown.
Section 3 - Sytstem Integration Block
1. Periodic Interrupt Timer equation
In section 3.7.4.2, in the periodic interrupt timer period equation, the "+1" should be carried through the equations.
Section 5 - Signal Description
1. Bus Request Signal description
In section 5.8, the Bus Request signal is shown incorrectly in figure 5-7 an d the description below the figure is incorrect. The pin is shown as bidirectional, but should be an out put only.The description shoud read, “This signal is an open-drain output request signal from the
IDMA and SDMA when the internal EC000 core is disabled.”
2. Port A / Bootstrap Mode description
In section 5.14 in the “NOTE” section, “To enable Boot from SCC2” should be replaced with “To enable Boot from SCC1.” The Bootstrap mode is only available on SCC1.
Section 6- Electrical Characteristics
1. Thermal Characteristic Values (?ja, ?jc) In section 6.2 in the thermal characteristic table, the value for ?ja should read 52.8, replacing TBD; also, the value for ?jc should read 10.4, replacing TBD.
2. Junction Temperature (Tj) Equation
In section 6.2, the junction temperature equation should read:
Tj = 70C + (5.25V*50mA*52.8C/W) = 83.9C.
3. AC Electrical Specification Changes at 3.3V
In section 6.8 in the AC Electrical Specification Table, all information is for 5.0V only. The only value which changes at 3.3V is Spec 47, the Asynchronous Input Setup Time (tASI). This value should be 12ns, instead of 10ns, at both 16.67 and 20MHz. 25MHz is not supported at 3.3V.
Internal Memory Map
1. SCCE2 Register
In section 2-24, in Table 2-6, the SCCE2 register should be 8 bits wide, not 16 bits as shown.
Section 3 - Sytstem Integration Block
1. Periodic Interrupt Timer equation
In section 3.7.4.2, in the periodic interrupt timer period equation, the "+1" should be carried through the equations.
Section 5 - Signal Description
1. Bus Request Signal description
In section 5.8, the Bus Request signal is shown incorrectly in figure 5-7 an d the description below the figure is incorrect. The pin is shown as bidirectional, but should be an out put only.The description shoud read, “This signal is an open-drain output request signal from the
IDMA and SDMA when the internal EC000 core is disabled.”
2. Port A / Bootstrap Mode description
In section 5.14 in the “NOTE” section, “To enable Boot from SCC2” should be replaced with “To enable Boot from SCC1.” The Bootstrap mode is only available on SCC1.
Section 6- Electrical Characteristics
1. Thermal Characteristic Values (?ja, ?jc) In section 6.2 in the thermal characteristic table, the value for ?ja should read 52.8, replacing TBD; also, the value for ?jc should read 10.4, replacing TBD.
2. Junction Temperature (Tj) Equation
In section 6.2, the junction temperature equation should read:
Tj = 70C + (5.25V*50mA*52.8C/W) = 83.9C.
3. AC Electrical Specification Changes at 3.3V
In section 6.8 in the AC Electrical Specification Table, all information is for 5.0V only. The only value which changes at 3.3V is Spec 47, the Asynchronous Input Setup Time (tASI). This value should be 12ns, instead of 10ns, at both 16.67 and 20MHz. 25MHz is not supported at 3.3V.
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