色哟哟视频在线观看-色哟哟视频在线-色哟哟欧美15最新在线-色哟哟免费在线观看-国产l精品国产亚洲区在线观看-国产l精品国产亚洲区久久

電子發燒友App

硬聲App

0
  • 聊天消息
  • 系統消息
  • 評論與回復
登錄后你可以
  • 下載海量資料
  • 學習在線課程
  • 觀看技術視頻
  • 寫文章/發帖/加入社區
會員中心
創作中心

完善資料讓更多小伙伴認識你,還能領取20積分哦,立即完善>

3天內不再提示
電子發燒友網>電子資料下載>類型>參考設計>CN0204 FMC-SDP轉接器和評估板/Xilinx KC705參考設計

CN0204 FMC-SDP轉接器和評估板/Xilinx KC705參考設計

2021-05-16 | pdf | 393.36KB | 次下載 | 3積分

資料介紹

This version (09 Jan 2021 00:55) was approved by Robin Getz.The Previously approved version (31 Dec 2020 05:57) is available.Diff

CN0204 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Reference Circuits

Overview

This document presents the steps to setup an environment for using the EVAL-CN0204-SDPZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-CN0204-SDPZ Evaluation Board with the Xilinx KC705 board.

cn0204.jpg

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · Adrian Costina

Below is presented a picture of SDP-B Controller Board with the EVAL-CN0204-SDPZ Evaluation Board.

cn0204_sdp1z.jpg

The EVAL-CN0204-SDPZ board provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS) applications. When using this evaluation board with the SDP board or BeMicro SDK board, apply +6 V and GND to Connector CN2, 12-50 V and GND to Connector CN3.

The AD5662 low power (0.75 mW typical @ 5 V), rail-to-rail output, 16-bit nanoDAC? device and the AD5751 industrial current/voltage output driver are well matched with respect to input and output voltage ranges, as well as reference voltage requirements.

The AD5662, a member of the nanoDAC family, is a low power, single, 16-bit buffered voltage-out DAC that operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design.

The AD5662 requires an external reference voltage to set the output range of the DAC. The part incorporates a power-on reset circuit that ensures the DAC output powers up to 0 V (AD5662x-1) or to midscale (AD5662x-2), and remains there until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode.

The low power consumption of this part in normal operation makes it ideally suited to portable battery-operated equipment. The power consumption is 0.75 mW at 5 V, going down to 2.4 μW in power-down mode. The AD5662’s on-chip precision output amplifier allows rail-to-rail output swing to be achieved. For remote sensing applications, the output amplifier’s inverting input is available to the user.

The AD5751 is a single-channel, low cost, precision, voltage/ current output driver with hardware or software programmable output ranges. The software ranges are configured via an SPI-/ MICROWIRE?-compatible serial interface. The AD5751 targets applications in PLC and industrial process control. The analog input to the AD5751 is provided from a low voltage, single-supply digital-to-analog converter (DAC) and is internally conditioned to provide the desired output current/voltage range.

The output current range is programmable across three current ranges: 0 mA to 20 mA, 0 mA to 24 mA, or 4 mA to 20 mA.

Voltage output is provided from a separate pin that can be configured to provide 0 V to 5 V, 0 V to 10 V, and 0 V to 40 V output ranges. An overrange is available on the voltage ranges. Analog outputs are short-circuit and open-circuit protected and can drive capacitive loads of 1 μF and inductive loads of 0.1 H.

The device is specified to operate with a power supply range from 10.8 V to 55 V. Output loop compliance is 0 V to AVDD ? 2.75 V.

The flexible serial interface is SPI and MICROWIRE compatible and can be operated in 3-wire mode to minimize the digital isolation required in isolated applications. The interface also features an optional PEC error checking feature using CRC-8 error checking, useful in industrial environments where data communication corruption can occur.

The device also includes a power-on reset function ensuring that the device powers up in a known state (0 V or tristate) and an asynchronous CLEAR pin that sets the outputs to zero-scale/midscale voltage output or the low end of the selected current range. An HW SELECT pin is used to configure the part for hardware or software mode on power-up.

More information

Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 14.6.
  • UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
  • The EVAL-CN0204 reference project for Xilinx KC705 FPGA.

Downloads

Run the Demonstration Project

Hardware setup


Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.

  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.

Reference Project Overview

The following commands were implemented in this version of EVAL-CN0204 reference project for Xilinx KC705 FPGA board.

Command Description
help? Displays all available commands.
register= Write a value to the DAC register. Accepted values:
0 .. 65535 - value to be written in register.
register? Displays the last value written to the DAC register.
ad5751clrPin= Sets the output value of CLR pin. Accepted values:
0 - sets the CLR pin low.(default)
1 - sets the CLR pin high.
ad5751clrPin? Displays the output value of CLR pin.
addressA0= Sets the value of A0 address bit(JP1). Accepted values:
0 - address is 0b000.(default)
1 - address is 0b001.
addressA0? Displays the value of A0 address bit(JP1).
range= Sets the output range for AD5751. Accepted values:
0 → 0V to 5V.
1 → 0V to 10V.
2 → 0V to 6V.
3 → 0V to 12V.
4 → 0V to 40V.
5 → 0V to 44V.
6 → 4mA to 20mA(external).
7 → 4mA to 20mA(internal).
8 → 0mA to 20mA(external).
9 → 0mA to 20mA(internal).
10 → 0mA to 24mA(external).
11 → 0mA to 24mA(internal).
12 → 3.92mA to 20.4mA(internal).
13 → 0mA to 20.4mA(internal).
14 → 0mA to 24.5mA(internal).
range? Displays the current output range.
fault? Displays the list of possible faults.

Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.

The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. terminal_kc705.jpg

Software Project Setup

The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design:

Github Repository

  • From this entire repository you will use cf_sdp_kc705 folder. This is common for all KC705 projects.

EDK KC705 project

  • Open the Xilinx SDK. When the SDK starts, it asks you to provide a folder where to store the workspace. Any folder can be provided. Make sure that the path where it is located does not contain any spaces.
  • In the SDK select the File→Import menu option to import the software projects into the workspace.

Import Projects

  • In the Import window select the General→Existing Projects into Workspace option.

Existing Projects Import

  • In the Import Projects window select the cf_sdp_kc705 folder as root directory and check the Copy projects into workspace option. After the root directory is chosen the projects that reside in that directory will appear in the Projects list. Press Finish to finalize the import process.

Projects Import

  • The Project Explorer window now shows the projects that exist in the workspace without software files.

Project Explorer

  • Now the software must be added in your project. For downloading the software, you must use 3 links from Github given in Downloads section. From there you'll download the specific driver, the specific commands and the Xilinx Boards Common Drivers(which are commons for all Xilinx boards). All the software files downloaded must be copied in src folder from sw folder.

Project complete

  • Before compilation in the file called Communication.h you have to uncomment the name of the device that you currently use. In the picture below there is an example of this, which works only with AD5629R project. For another device, uncomment only the respective name. You can have one driver working on multiple devices, so the drivers's name and the uncommented name may not be the same for every project.

Communication.h

  • The SDK should automatically build the project and the Console window will display the result of the build. If the build is not done automatically, select the Project→Build Automatically menu option.
  • If the project was built without any errors, you can program the FPGA and run the software application.
13 Aug 2013 09:22 · Lucian Sin

More information

28 May 2012 15:18
下載該資料的人也在下載 下載該資料的人還在閱讀
更多 >

評論

查看更多

下載排行

本周

  1. 1電子電路原理第七版PDF電子教材免費下載
  2. 0.00 MB  |  1491次下載  |  免費
  3. 2單片機典型實例介紹
  4. 18.19 MB  |  95次下載  |  1 積分
  5. 3S7-200PLC編程實例詳細資料
  6. 1.17 MB  |  27次下載  |  1 積分
  7. 4筆記本電腦主板的元件識別和講解說明
  8. 4.28 MB  |  18次下載  |  4 積分
  9. 5開關電源原理及各功能電路詳解
  10. 0.38 MB  |  11次下載  |  免費
  11. 6100W短波放大電路圖
  12. 0.05 MB  |  4次下載  |  3 積分
  13. 7基于單片機和 SG3525的程控開關電源設計
  14. 0.23 MB  |  4次下載  |  免費
  15. 8基于AT89C2051/4051單片機編程器的實驗
  16. 0.11 MB  |  4次下載  |  免費

本月

  1. 1OrCAD10.5下載OrCAD10.5中文版軟件
  2. 0.00 MB  |  234313次下載  |  免費
  3. 2PADS 9.0 2009最新版 -下載
  4. 0.00 MB  |  66304次下載  |  免費
  5. 3protel99下載protel99軟件下載(中文版)
  6. 0.00 MB  |  51209次下載  |  免費
  7. 4LabView 8.0 專業版下載 (3CD完整版)
  8. 0.00 MB  |  51043次下載  |  免費
  9. 5555集成電路應用800例(新編版)
  10. 0.00 MB  |  33562次下載  |  免費
  11. 6接口電路圖大全
  12. 未知  |  30320次下載  |  免費
  13. 7Multisim 10下載Multisim 10 中文版
  14. 0.00 MB  |  28588次下載  |  免費
  15. 8開關電源設計實例指南
  16. 未知  |  21539次下載  |  免費

總榜

  1. 1matlab軟件下載入口
  2. 未知  |  935053次下載  |  免費
  3. 2protel99se軟件下載(可英文版轉中文版)
  4. 78.1 MB  |  537793次下載  |  免費
  5. 3MATLAB 7.1 下載 (含軟件介紹)
  6. 未知  |  420026次下載  |  免費
  7. 4OrCAD10.5下載OrCAD10.5中文版軟件
  8. 0.00 MB  |  234313次下載  |  免費
  9. 5Altium DXP2002下載入口
  10. 未知  |  233046次下載  |  免費
  11. 6電路仿真軟件multisim 10.0免費下載
  12. 340992  |  191183次下載  |  免費
  13. 7十天學會AVR單片機與C語言視頻教程 下載
  14. 158M  |  183277次下載  |  免費
  15. 8proe5.0野火版下載(中文版免費下載)
  16. 未知  |  138039次下載  |  免費
主站蜘蛛池模板: 亚洲免费在线观看视频 | 久久精品WWW人人爽人人 | 在线视频中文字幕 | 久久中文电影 | 国产SUV精品一区二区883 | www.绿巨人| 久草精品视频 | 丰满老熟好大bbbxxx | 性夜影院爽黄A爽免费动漫 性夜夜春夜夜爽AA片A | 伦理片秋霞免费影院 | 国产精品久久自在自2021 | 最新亚洲一区二区三区四区 | yy8090理论三级在线看 | 边摸边吃奶玩乳尖视频 | 国产精品久久久久久人妻精品流 | 久久亚洲精品AV成人无码 | 国产亚洲精品久久久闺蜜 | 无码国产欧美日韩精品 | 他揉捏她两乳不停呻吟口述 | 内射人妻骚骚骚 | 无码人妻丰满熟妇区五十路久久 | 精子射到丝袜上图 | 久久 这里只精品 免费 | 88蜜桃人妻无码精品系列 | 亚洲AV无码久久流水呻蜜桃久色 | 国产精品路线1路线2路线 | 最近日本字幕免费高清 | 最近韩国HD免费观看国语 | 撅高 自己扒开 调教 | 最近的2019中文字幕国语版 | 九九久久久2 | 囯产少妇BBBBBB高潮喷水一 | 伊人久久久久久久久久 | 手机毛片在线 | 纯肉高H种马艳遇风流多 | 新香蕉少妇视频网站 | 精品国产午夜福利在线观看蜜月 | 女朋友的妈妈在线观看 | 麻豆第一区MV免费观看网站 | 欧美.亚洲.日韩.天堂 | 99精品无码AV在线播放 |